DSP processor fundamentals Architectures and features

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριος συγγραφέας: Lapsley Phil 1965-
Μορφή: Βιβλίο
Γλώσσα:English
Έκδοση: IEEE Press
Σειρά:IEEE Press Series on Signal Processing

MARC

LEADER 00000nam a2200000 i 4500
001 1/5758
010 |a 0-7803-3405-1 
035 |l 10005477 
100 |a 19990123d1997 0grey0105 ba 
101 0 |a eng 
200 1 |a DSP processor fundamentals  |e Architectures and features  |f Phil Lapsley...[et.al.] 
210 |a New York  |c IEEE Press  |d c.1997 
215 |a 210 p.  |c fig.  |d 23 cm. 
225 2 |a IEEE Press Series on Signal Processing 
320 |a Includes index 
410 1 |t IEEE Press Series on Signal Processing 
606 0 |a Επεξεργασία σήματος  |x Ψηφιακές τεχνικές 
606 0 |a Μικροεπεξεργαστές 
676 |a 621.382 202 854 16 
701 1 |a Lapsley  |b Phil  |f 1965- 
709 |a IEEE Press 
801 0 |a GR  |b ΠΑ.Δ.Α. - Βιβλιοθήκη Πανεπιστημιούπολης 2  |g AACR2 
852 |a INST  |b LIBRARY  |e 19990422  |h 621.382 202 854 16 DSP  |p 000015193  |q 000015193  |t BK  |y 0  |z 4 
852 |a INST  |b LIBRARY  |e 19990422  |h 621.382 202 854 16 DSP  |p 000015196  |q 000015196  |t BK  |y 0  |z 3 
852 |a INST  |b LIBRARY  |e 19990422  |h 621.382 202 854 16 DSP  |p 000015228  |q 000015228  |t BK  |y 0  |z 2 
852 |a INST  |b LIBRARY  |e 19990208  |h 621.382 202 854 16 DSP  |p 000017493  |q 000017493  |t BK  |y 23  |z 1 
901 |a PART-IV Φ.24 
909 |b 014008 
909 |b 016199 (c.2) 
909 |b 016212 (c.3) 
909 |b 016213 (c.4) 
970 |a ΚΟΥΤΡΑΣ  |b ΓΙΩΡΓΟΣ  |z 1999-01 

Εγγραφή στο Ευρετήριο Αναζήτησης

_version_ 1780545243256455169
author Lapsley Phil 1965-
author_facet Lapsley Phil 1965-
author_role
author_sort Lapsley Phil 1965-
author_variant l p lp
building Campus Library II
collection LIB2 Catalog
dewey-full 621.38220285416
dewey-hundreds 600
dewey-ones 621
dewey-raw 621.382 202 854 16
dewey-search 621.382 202 854 16
dewey-sort 3621.382 3202 3854 216
dewey-tens 620
format Book
fullrecord {"leader":"01413nam a2200349 i 4500","fields":[{"001":"1/5758"},{"010":{"subfields":[{"a":"0-7803-3405-1"}],"ind1":" ","ind2":" "}},{"035":{"subfields":[{"l":"10005477"}],"ind1":" ","ind2":" "}},{"100":{"subfields":[{"a":"19990123d1997 0grey0105 ba"}],"ind1":" ","ind2":" "}},{"101":{"subfields":[{"a":"eng"}],"ind1":"0","ind2":" "}},{"200":{"subfields":[{"a":"DSP processor fundamentals"},{"e":"Architectures and features"},{"f":"Phil Lapsley...[et.al.]"}],"ind1":"1","ind2":" "}},{"210":{"subfields":[{"a":"New York"},{"c":"IEEE Press"},{"d":"c.1997"}],"ind1":" ","ind2":" "}},{"215":{"subfields":[{"a":"210 p."},{"c":"fig."},{"d":"23 cm."}],"ind1":" ","ind2":" "}},{"225":{"subfields":[{"a":"IEEE Press Series on Signal Processing"}],"ind1":"2","ind2":" "}},{"320":{"subfields":[{"a":"Includes index"}],"ind1":" ","ind2":" "}},{"410":{"subfields":[{"t":"IEEE Press Series on Signal Processing"}],"ind1":" ","ind2":"1"}},{"606":{"subfields":[{"a":"\u0395\u03c0\u03b5\u03be\u03b5\u03c1\u03b3\u03b1\u03c3\u03af\u03b1 \u03c3\u03ae\u03bc\u03b1\u03c4\u03bf\u03c2"},{"x":"\u03a8\u03b7\u03c6\u03b9\u03b1\u03ba\u03ad\u03c2 \u03c4\u03b5\u03c7\u03bd\u03b9\u03ba\u03ad\u03c2"}],"ind1":"0","ind2":" "}},{"606":{"subfields":[{"a":"\u039c\u03b9\u03ba\u03c1\u03bf\u03b5\u03c0\u03b5\u03be\u03b5\u03c1\u03b3\u03b1\u03c3\u03c4\u03ad\u03c2"}],"ind1":"0","ind2":" "}},{"676":{"subfields":[{"a":"621.382 202 854 16"}],"ind1":" ","ind2":" "}},{"701":{"subfields":[{"a":"Lapsley"},{"b":"Phil"},{"f":"1965-"}],"ind1":" ","ind2":"1"}},{"709":{"subfields":[{"a":"IEEE Press"}],"ind1":" ","ind2":" "}},{"801":{"subfields":[{"a":"GR"},{"b":"\u03a0\u0391.\u0394.\u0391. - \u0392\u03b9\u03b2\u03bb\u03b9\u03bf\u03b8\u03ae\u03ba\u03b7 \u03a0\u03b1\u03bd\u03b5\u03c0\u03b9\u03c3\u03c4\u03b7\u03bc\u03b9\u03bf\u03cd\u03c0\u03bf\u03bb\u03b7\u03c2 2"},{"g":"AACR2"}],"ind1":" ","ind2":"0"}},{"852":{"subfields":[{"a":"INST"},{"b":"LIBRARY"},{"e":"19990422"},{"h":"621.382 202 854 16 DSP"},{"p":"000015193"},{"q":"000015193"},{"t":"BK"},{"y":"0"},{"z":"4"}],"ind1":" ","ind2":" "}},{"852":{"subfields":[{"a":"INST"},{"b":"LIBRARY"},{"e":"19990422"},{"h":"621.382 202 854 16 DSP"},{"p":"000015196"},{"q":"000015196"},{"t":"BK"},{"y":"0"},{"z":"3"}],"ind1":" ","ind2":" "}},{"852":{"subfields":[{"a":"INST"},{"b":"LIBRARY"},{"e":"19990422"},{"h":"621.382 202 854 16 DSP"},{"p":"000015228"},{"q":"000015228"},{"t":"BK"},{"y":"0"},{"z":"2"}],"ind1":" ","ind2":" "}},{"852":{"subfields":[{"a":"INST"},{"b":"LIBRARY"},{"e":"19990208"},{"h":"621.382 202 854 16 DSP"},{"p":"000017493"},{"q":"000017493"},{"t":"BK"},{"y":"23"},{"z":"1"}],"ind1":" ","ind2":" "}},{"901":{"subfields":[{"a":"PART-IV \u03a6.24"}],"ind1":" ","ind2":" "}},{"909":{"subfields":[{"b":"014008"}],"ind1":" ","ind2":" "}},{"909":{"subfields":[{"b":"016199 (c.2)"}],"ind1":" ","ind2":" "}},{"909":{"subfields":[{"b":"016212 (c.3)"}],"ind1":" ","ind2":" "}},{"909":{"subfields":[{"b":"016213 (c.4)"}],"ind1":" ","ind2":" "}},{"970":{"subfields":[{"a":"\u039a\u039f\u03a5\u03a4\u03a1\u0391\u03a3"},{"b":"\u0393\u0399\u03a9\u03a1\u0393\u039f\u03a3"},{"z":"1999-01"}],"ind1":" ","ind2":" "}}]}
id lib2_1/5758
illustrated Illustrated
institution University of West Attica
isbn 0-7803-3405-1
language English
physical 210 p. fig. 23 cm.
publishDate 1997
publisher IEEE Press
record_format marc
series2 IEEE Press Series on Signal Processing
spelling 19990123d1997 0grey0105 ba
eng
DSP processor fundamentals Architectures and features Phil Lapsley...[et.al.]
New York IEEE Press c.1997
210 p. fig. 23 cm.
IEEE Press Series on Signal Processing
Includes index
Επεξεργασία σήματος Ψηφιακές τεχνικές
Μικροεπεξεργαστές
621.382 202 854 16
Lapsley Phil 1965-
IEEE Press
GR ΠΑ.Δ.Α. - Βιβλιοθήκη Πανεπιστημιούπολης 2 AACR2
INST LIBRARY 19990422 621.382 202 854 16 DSP 000015193 000015193 BK 0 4
INST LIBRARY 19990422 621.382 202 854 16 DSP 000015196 000015196 BK 0 3
INST LIBRARY 19990422 621.382 202 854 16 DSP 000015228 000015228 BK 0 2
INST LIBRARY 19990208 621.382 202 854 16 DSP 000017493 000017493 BK 23 1
spellingShingle Lapsley Phil 1965-
DSP processor fundamentals Architectures and features
Επεξεργασία σήματος Ψηφιακές τεχνικές
Μικροεπεξεργαστές
title DSP processor fundamentals Architectures and features
title_auth DSP processor fundamentals Architectures and features
title_full DSP processor fundamentals Architectures and features Phil Lapsley...[et.al.]
title_fullStr DSP processor fundamentals Architectures and features Phil Lapsley...[et.al.]
title_full_unstemmed DSP processor fundamentals Architectures and features Phil Lapsley...[et.al.]
title_short DSP processor fundamentals
title_sub Architectures and features
topic Επεξεργασία σήματος Ψηφιακές τεχνικές
Μικροεπεξεργαστές
topic_facet Επεξεργασία σήματος Ψηφιακές τεχνικές
Μικροεπεξεργαστές